Samplers

Interface

T.S. Ikin

Introduction

The Interface Board sits logically between the Samplers and the Adlink Board.

Features

Adlink SCSI Signals Relevent to COBRA

The following table is an extract from the Adlink manual. The data direction sense is that as seen by the Adlink card. i.e. I is from Interface board to Adlink board.O is from Adlink Board to Interface Board.
Signal NameSignal TypeSignal DirectionDescription
PB(15:0)DATAI/OPortB bidirectional data lines-PB15 is the MSB, and PB0 is the LSB.
PA(15:0)DATAI/OPortA bidirectional data lines-PA15 is the MSB, and PA0 is the LSB.
AUXDO(3:0)DATAOAUX DO 3…0 – can be used as extra output data or can be used as extra control signals.
AUXDI(3:0)DATAIAUX DI 3…0 – can be used as extra input data or can be used as extra control signals.
DI-REQCONTROLIRequest line – In external clock mode, DI-REQ carries the external clock input.
DO-REQCONTROLORequest line – In handshaking mode, DO-REQ carries handshaking control information to peripheral.
DO-ACKCONTROLIDigital output Acknowledge lines– In handshaking mode, DO-ACK carries handshaking status information from the peripheral.

Data Lines used as Control Signals

Two Auxilary signals output from the Adlink board have been used to control the interface board

Adlink Signal NameAliasFunction
AUXDO0ARMWhen HIGH sampling or test mode will commence on the following 10 seconds
When LOW sampling or test mode will cease
AUXDO1DIRECTIONWhen HIGH data flow is from Interface to Adlink (SAMPLING Mode)
When LOW data flow is from Adlink to Interface (INITIALISATION Mode)
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Data from the Samplers When DIRECTION = 1 (SAMPLING Mode)

Ports PA(15:0) and PB(15:0) have been used as follows:

PA(15:0)
PA15PA14PA13PA12PA11PA10PA9PA8PA7PA6PA5PA4PA3PA2PA1PA0
RI7RI6RI5RI4RI3RI2RI1RI0RQ7RQ6RQ5RQ4RQ3RQ2RQ1RQ0

PB(15:0)
PB15PB14PB13PB12PB11PB10PB9PB8PB7PB6PB5PB4PB3PB2PB1PB0
LI7LI6LI5LI4LI3LI2LI1LI0LQ7LQ6LQ5LQ4LQ3LQ2LQ1LQ0

Where:

Data flow is controlled by the interface in a non-handshaking mode. Refer to the Adlink manual, section 4.10.2 "Digital Input DMA in External Clock Mode" Data is clocked into the Adlink board on the rising edge of the DI-REQ signal.

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Data from the Adlink Board When DIRECTION = 0 (INITIALISATION Mode)

For this mode to function, the toggle switch on the front of the board must be in the "remote" setting. In this mode, only 16 bits are used, PB(0:16).
PB(15:0)
PB15PB14PB13PB12PB11PB10PB9PB8PB7PB6PB5PB4PB3PB2PB1PB0
A7A6A5A4A3A2A1A0D7D6D5D4D3D2D1D0

Where:

Data flow is controlled by the Adlink Board in a handshaking mode. This is because there are some time sensisitve registers to be filled. The Interface Board, "handshakes" when data is latched. Refer to the Adlink manual, section 4.11.2 "Digital Output DMA in Handshaking Mode." Data is clocked onto the Interface Board on the rising edge of the DO-REQ signal, as generated by the Adlink Board. The Interface Board acknowledges receipt of data by asserting the DO-ACK line.

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Initialisation Registers

The interface board has on-board registers which control sampling rate, and determine which of the two samplers is active. The interface board also acts as a channel to program the following: The programming of the Interface Board is by one of two means.
  1. Manual: DIP switches on the front of the Interface Board may be used to program the initial settings of all registers. There are two sets of eight DIP switches, one set acts as ADDRESS, and the other as DATA. A push button "Enters" the DATA onto the selected ADDRESS.
  2. Remote: Similar to Manual Mode, but DATA and ADDRESS information is sent over the data cable from the DMA interface board.
A toggle switch selects between these two modes, and if this is set to Manual, all INITIALISATION commands from the DMA interface will be ignored! When DIRECT=0 it is possible to program all the available registers in the Interface, the Samplers, and the LO's. In the following table every bit-wise flag is shown, firstly its location, and in following tables, the functionality.

Register FunctionA7A6A5A4A3A2A1A0D7D6D5D4D3D2D1D0
Sampler 0 Register00000000-spare-BANDSWATTR3ATTR2ATTR1ATTL3ATTL2ATTL1
Sampler 1 Register00000001-spare-BANDSWATTR3ATTR2ATTR1ATTL3ATTL2ATTL1
Interface Register A00000010-spare--spare--spare-SAMPLER1SAMPLER0SPEED2SPEED1SPEED0
Interface Register B00000011-spare--spare--spare--spare--spare--spare--spare--spare-
LO0 Frequency Register00000100FREQ7FREQ6FREQ5FREQ4FREQ3FREQ2FREQ1FREQ0
LO1 Frequency Register00000101FREQ7FREQ6FREQ5FREQ4FREQ3FREQ2FREQ1FREQ0
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BANDSW selects between the two available frequency bands on the specific sampler as follows:
BANDSWFrequency Band
0Band 1
1Band 2

 
ATTL(3:1) sets the left hand attenuation, and ATTR(3:1) the right. This is a logical relationship as shown below:
ATTx3ATTx2ATTx1Attenuation dB
000No Attenuation
0011dB
0102dB
0113dB
1004dB
1015dB
1106dB
1117dB

 
SAMPLER(1:0) determines which of the two Samplers are selected. It is important to set these correctly to avoid corrupt data:
SAMPLER1SAMPLER0Effect
00No Samplers selected, (only used for test modes)
01Only Sampler 0 selected
10Only Sampler 1 selected
11Both Samplers 0 & 1 selected

 
SPEED(2:0) sets the Sampling Rate and data transmission rate of the machine as follows:
SPEED2SPEED1SPEED0Sampling Rate Mega Samples per secTransmission Rate Mega bytes/ sec
0001040
001520
0102.510
0111.255
100Test Mode40
101Test Mode20
110Test Mode10
111Test Mode5
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Header Word Generation

Once each second two header words are produced in the data. This appears in the place of sampled data following the rising edge of the station 1PPS signal. The following tables describe the words transmitted. Briefly, there are flag words, a count word and identifier words. Note that this is not produced in the test modes.

PA(15:0)
Word 1 PA15PA14PA13PA12PA11PA10PA9PA8PA7PA6PA5PA4PA3PA2PA1PA0
1111111111111111
 
PB15PB14PB13PB12PB11PB10PB9PB8PB7PB6PB5PB4PB3PB2PB1PB0
1111111111111111
 
Word 2 PA15PA14PA13PA12PA11PA10PA9PA8PA7PA6PA5PA4PA3PA2PA1PA0
c(15)c(14)c(13)c(12)c(11)c(10)c(9)c(8)c(7)c(6)c(5)c(4)c(3)c(2)c(1)c(0)
 
PB15PB14PB13PB12PB11PB10PB9PB8PB7PB6PB5PB4PB3PB2PB1PB0
ID(7)ID(6)ID(5)ID(4)ID(3)ID(2)ID(1)ID(0)11111111

Where:

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Test Modes

When the three SPEED bits in the Interface Register are set to 100 ; 101 ; 110 ;or 111 the Interface Board enters a test mode state. The board produces 32 bits of count word incrementing at 5,10,20 and 40 Million Bytes per second. This runs continuously while the two control bits (AUXO0, and AUXO1) are asserted.

Sampling Mode Sequence of Operation

When all registers are correctly set, either by DIP switches or Remote Control, sampling may begin. This is done by setting DIRECTION=HIGH, and ARM=HIGH. Sampling will commence synchronously with the following round ten second. The first two words to be transmitted will be the two 32 bit header words as described. Following this will be the data. One 32 bit word is transmitted per sample period per sampler board selected. SAMPLER0 data is transmitted first then SAMPLER1 data. This will continue until the next 1PPS, when the header words will again be transmitted. This state will continue until ARM is cleared to low.

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LED's on the front of Interface Board

Subject to change to make a more logical display!
SPEED0
SPEED1
SPEED2
SAMPLER0
SAMPLER1
ARM
DIRECTION
(ARM AND DIRECTION)
SPARE
LO_LOCK0
LO_LOCK1

Written by Tim Ikin on 27th February 2002
Modified by Tim Ikin on 24th May 2002